MKY43
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CUnet master IC 3.3 V (5 V tolerant) |
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The MKY43 is a CUnet MEM mode (master/slave) IC. If it is connected to a CPU using an 8-bit or 16-bit bus, it can be accessed from the CPU. As a MEM mode IC, an MKY43 can be used as either a master or a slave terminal on a CUnet network. The MKY43 includes 512 bytes of shared memory, a buffer for its mail function, and a communication control register. |
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[512 bytes of shared memory]
The 512-byte shared memory consists of 64 blocks (8 bytes per block). This 512-byte shared memory is composed of a "self-owned area" to which only the CPU connected to itself (CUnet IC) can write, and an area where input data from other CUnet ICs is copied.
The number of blocks to use (self-owned area) can be specified for MKY43.
All of the data written by itself and input data from other CUnet ICs are applied to its 512-byte shared memory.
This means that the CPU easily grasps the state of the whole CUnet network simply by reading the shared memory of the CUnet IC connected thereto.
[Mail function buffer]
The mail function buffer consists of 2 receiving buffers and 1 send buffer. Each buffer is 256 bytes.
Process completion can be identified by detecting the send complete flag and the receive complete flag.
[Communication control register]
This register controls communication, including communication start, error checking, mail sending and receiving, etc. CUnet communication can be controlled easily just by accessing this register. The MKY43 also has 2 interrupt pins. It has a variety of interrupt functions including a shared memory-update interrupt, a mail-send interrupt, a mail receive-complete interrupt, a specific terminal-participation interrupt, a specific terminal-release interrupt, and a communication-error interrupt.
In addition to this wealth of interrupt function, the MKY43 also contains built-in communication protocol, allowing it to relieve the load on the CPU for communication functions.
[Differences between the MKY43 and the MKY40 (MEM mode)]
The MKY43 was developed to inherit the functions of the CUnet MKY40 (MEM mode, 5 V). The MKY43 works and functions just like the MKY40, but please observe the following practical differences in its use.
Differences between MKY43 and MKY40 (MEM mode)
| Model | MKY43 | MKY40 |
|---|---|---|
| Power supply voltage | 3.3 V | 5.0 V |
| Package | 0.5-mm pitch 64 pins TQFP | 0.5-mm pitch 100 pins TQFP |
| Bus pin level | 3.3 V TTL (5 V tolerant) (5.0 V TTL level CPU bus can be connected.) |
5 V TTL level (It is possible to connect only the 5.0 V system TTL level CPU bus.) |
| Bus width | 16 bits / 8 bits | 32 bits / 16 bits / 8 bits |
| Byte write when 16-bit user bus is connected | Byte write is not supported (for write access). (Set both #WRH pin and #WRL pin Low.) |
Byte write is supported. |
| Interrupt pin | #INT0, #INT1 | #INT0, #INT1, #INT2 |
| Port Out bit of SSR Care Pulse bit of BCR |
Not provided | PO0, PO1, PO2, PO3 (SSR) CP (BCR) |
| Setting pin for address, etc. (Initial value of BCR is written) |
Not provided | #SA0 to #SA5, #OWN0 to #OWN5, BPS0, BPS1 |
| IO mode function | Not provided | Provided (The MODE pin is provided.) |
| CYCT output, PING output (CYCT is equivalent to STB) |
#CYCT signal and #PING signal can be output to UTY1 pin and UTY2 pin. | #STB signal and PING signal are output to #STB pin and PING pin respectively |
| UTCR (UTility pin Control Register) |
Added for controlling UTY1 pin and UTY2 pin. (Set this register by selecting from among Hi-Z, #CYCT output, and #PING output.) |
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| Driving clock | Clock input to the Xi pin (The oscillator is not supported.) |
Clock input to the Xi pin. Or the crystal oscillator between the Xi pin and Xo pin can be supported. |
| TXD pin output during reset period |
Low level | Clock frequency obtained by dividing the driving clock by 32 |
| Hazard protection | Hazard-protection-buffer method | Window-lock method |
| Memory map | Different from that of the MKY40 | ------- |
| Address of each register | Different from that of the MKY40 | ------- |
| Bus access time | TRD (max) 89 ns | TRD (max) 130 ns |
| Operating current (max) | 75 mA | 130 mA |
MKY43 specifications
| Bus width | 8 bits / 16 bits |
|---|---|
| Control pin | CS, RD, WRL, WRH |
| Interrupt pin | 2 pins |
| Supported CPU voltage | 3.3 V (5 V tolerant) |
| Communication method | CUnet communication |
|---|---|
| Communication rate | 3/6/12 Mbps (half duplex) |
| Package | TQFP 64-pin |
| Package dimensions | 12×12×1.2 mm (0.5 mm pitch) |
| Operating ambient temperature | -40 to +85°C |
| Supply voltage | 3.3 V |
| External input operating frequency | 48 MHz |
